1. Field of the Invention
Embodiments of the invention relate generally to transistors and methods of manufacture and, more particularly, to gate structures for use in transistors and methods of manufacture.
2. Description of the Related Art
Materials such as silicon (Si) and gallium arsenide (GaAs) have found wide application in semiconductor devices for low power and, in the case of Si, low frequency applications. However, these more familiar semiconductor materials may not be well-suited for high power and/or high frequency applications, for example, due to their relatively small bandgaps (1.12 eV for Si and 1.42 for GaAs at room temperature) and relatively small breakdown voltages.
In light of the difficulties presented by Si and GaAs, interest in high power, high temperature and/or high frequency applications and devices has focused on wide bandgap semiconductor materials such as silicon carbide (2.996 eV for alpha SiC at room temperature) and the Group III nitrides (e.g., 3.36 eV for GaN at room temperature). These materials, typically, may have higher electric field breakdown strengths and higher electron saturation velocities as compared to GaAs and Si.
A device of particular interest for high power and/or high frequency applications is the High Electron Mobility Transistor (HEMT), which is also known as a modulation doped field effect transistor (MODFET). In a HEMT device, a two-dimensional electron gas (2DEG) may be formed at the heterojunction of two semiconductor materials with different bandgap energies. The smaller bandgap material may have a higher electron affinity than the wider bandgap material. The 2DEG is an accumulation layer in the undoped smaller bandgap material and can contain a relatively high sheet electron concentration, for example, in excess of 1013 carriers/cm2. Additionally, electrons that originate in the wider bandgap semiconductor may transfer to the 2DEG, allowing a relatively high electron mobility due to reduced ionized impurity scattering. This combination of relatively high carrier concentration and carrier mobility can give the HEMT a relatively large transconductance and may provide a performance advantage over metal-semiconductor field effect transistors (MESFETS) for high-frequency applications.
HEMTs fabricated in the gallium nitride/aluminum gallium nitride (GaN/AlGaN) material system can generate large amounts of RF power due to a combination of material characteristics, such as relatively high breakdown fields, relatively wide bandgaps, relatively large conduction band offset, and/or relatively high saturated electron drift velocity. A major portion of the electrons in the 2DEG may be attributed to polarization in the AlGaN.
HEMTs in the GaN/AlGaN system have already been demonstrated. For example, U.S. Pat. Nos. 5,192,987 and 5,296,395 describe AlGaN/GaN HEMT structures and methods of manufacture. In addition, U.S. Pat. No. 6,316,793, to Sheppard et al., which is commonly assigned with the present application, describes a HEMT device having a semi-insulating silicon carbide substrate, an AlN buffer layer on the substrate, an insulating GaN layer on the buffer layer, an AlGaN barrier layer on the GaN layer, and a passivation layer on the AlGaN active structure. Moreover, U.S. Patent Application Publication No. U.S. 2005/0170574 to Sheppard et al., which is also commonly assigned, describes a HEMT device including a protective layer and/or a low damage recess fabrication technique which may reduce damage to the semiconductor in the gate region of the transistor that can occur during an anneal of the ohmic contacts of the device.
One step in the fabrication of HEMT devices is the formation of the gate electrode. Conventional methods of gate electrode formation may include depositing a dielectric, etching through the dielectric using a mask and/or other sacrificial layer, and depositing a T-shaped gate electrode (referred to as a “T-gate”) into the etched portion of the dielectric. However, in such conventional methods, gaps may be formed between the edges of the dielectric and the gate electrode, due to isotropy of the dielectric etch. This may be detrimental to device operation, as the unpassivated semiconductor surface exposed by the gap may cause current collapse and/or drift in the device. In addition, although a passivation layer may be formed in the gap after formation of the gate, the passivation properties of such a post-gate passivation layer may be inferior to that of the initial pre-gate dielectric. This may be due to the fact that the pre-gate dielectric can be formed at relatively high temperatures, which may not be feasible once the gate metallization has been deposited.
Accordingly, other methods of gate electrode formation have been developed to prevent formation of such a gap. For example, the mask and/or other sacrificial layer may be removed from the dielectric prior to formation of the gate electrode in the etched portion of the dielectric. As such, the gate electrode may completely fill the etched portion of the dielectric, and “wings” or side lobes of the gate electrode may be formed directly on the dielectric surface. Such a gate electrode is referred to as a dielectrically-supported T-gate, or a “gamma” gate.
U.S. Patent Application Publication No. 2007/0164321 to Sheppard et al., commonly assigned with the present application, discusses methods for fabricating transistors including supported gate electrodes.